Transformational Generative AI Capabilities, Starting with Synopsys.ai Copilot, to Fuel Next-Level Productivity for Chipmakers 

Highlights:

• Synopsys, a pioneer in AI-driven EDA, aims to revolutionize the industry with generative AI capabilities, starting with Synopsys.ai Copilot, across the Synopsys.ai suite, building on its AI-driven optimization and data analytics solutions.
• Expansion of Synopsys.ai with generative AI capabilities will include collaborative, generative, and autonomous design to significantly boost productivity and accelerate innovation.
• Early collaborations with AMD, Intel, and Microsoft substantiate the power of generative AI for chip design.

SUNNYVALE, Calif., Nov. 27, 2023 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS) today announced the expansion of its leading Synopsys.ai™ EDA suite, to bring the power of generative artificial intelligence (GenAI) across the full stack in order to dramatically improve engineering productivity for the semiconductor industry. This expands upon Synopsys’ recent announcement to deliver Synopsys.ai Copilot, the first in a series of GenAI capabilities for chip design.

The integration of GenAI across the Synopsys.ai suite will provide chip designers with collaborative capabilities that offer expert tool guidance; generative capabilities for RTL, verification, and other collateral creation; and autonomous capabilities for workflow creation from natural language. Synopsys is engaging early with leading chip makers including AMD, Intel, and Microsoft to leverage the value of GenAI across the Synopsys.ai full EDA stack, from design and verification to test and manufacturing.        

“For 37 years, Synopsys has helped chipmakers solve their toughest design challenges and continues to be a catalyst for semiconductor progress,” said Shankar Krishnamoorthy, general manager, Synopsys EDA Group. “As the pioneer of AI-driven chip design, Synopsys is directly addressing engineering productivity during a period of talent shortages by expanding our leading Synopsys.ai suite to include generative AI capabilities across the full stack. This is an exciting time in the semiconductor industry and Synopsys continues to innovate relentlessly to enable the industry to meet stringent compute and performance-per-watt requirements of end markets.”

Hyperconverged AI-Driven EDA Suite Delivers Sustained Differentiation 
As the pioneer of AI-driven chip design, Synopsys is addressing the engineering productivity gap by delivering production-proven, AI-driven optimization and data analytics capabilities across all stages of IC chip development. The Synopsys.ai EDA suite accelerates the chip design workflow by enabling companies to build more chips faster with a workforce that is not growing at the same pace as the industry demands.

Now, in collaboration with leading customers, Synopsys is working on extending this to the next level of productivity with generative AI capabilities across the EDA stack, including:

• Collaborative capabilities that provide engineers with guidance on tool knowledge, analysis of results, and enhanced EDA workflows
• Generative capabilities to expedite development of RTL, formal verification assertion creation, and UVM testbenches
• Autonomous capabilities, which will enable end-to-end workflow creation from natural language spanning architecture to design and manufacturing

Industry Leaders Embrace Synopsys.ai Generative AI Capabilities
Synopsys is currently enabling Synopsys.ai GenAI collaborative and generative capabilities for the following industry leaders:

“AMD is very excited about the opportunities we see to provide our design teams with generative AI capabilities that will enable them to more efficiently deliver multiple generations of leadership products,” said Mydung Pham, corporate vice president, Silicon Design Engineering at AMD. “We have adopted generative AI capabilities like those in Synopsys.ai EDA suite to provide our design teams with tools that can accelerate high quality RTL generation and reduce turnaround time for complex design tasks. We are excited to be working with Synopsys on this transformative journey.”

“Generative AI capabilities in Synopsys.ai EDA suite can provide a real boost to designer productivity,” said Navid Shahriari, senior vice president and co-general manager of Intel’s Design Engineering Group. “The ability for the system to automatically generate RTL based on natural language specifications will allow design teams to work efficiently in the face of increasing chip design complexity.”  

“Microsoft partners with EDA solution providers to enable us to quickly integrate innovation from across the industry,” said Silvian Goldenberg, general manager, Silicon Development CAD at Microsoft. “Our engineering teams worked closely with Synopsys on the development of Synopsys.ai Copilot and plan to apply its generative AI to workflows like formal verification to increase accessibility and reduce the time from ideation to design.”

For more information, visit www.synopsys.ai.

Additional Insights and News 

• Synopsys Announces Synopsys.ai Copilot
• Video: Synopsys and Microsoft Power Breakthrough GenAI Capability for Chip Design
• Demo: Unlock Massive Productivity Gains for Chip Design with Synopsys.ai Copilot

About Synopsys
Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As an S&P 500 company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and offers the industry’s broadest portfolio of application security testing tools and services. Whether you’re a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing more secure, high-quality code, Synopsys has the solutions needed to deliver innovative products. Learn more at www.synopsys.com.

Forward-Looking Statements
This press release contains forward-looking statements, including statements regarding the intended expansion of AI capabilities across Synopsys’ EDA stack and the anticipated benefits of such capabilities. Forward-looking statements are subject to both known and unknown risks and uncertainties that may cause actual results to differ materially from those expressed or implied in the forward-looking statements. These risks and uncertainties include, among others, Synopsys’ ability to develop, test, and launch the capabilities, current and prospective customers’ ability or desire to adopt the solutions with such capabilities, and general business and market conditions. Other risks and uncertainties that may apply are set forth in the Risk Factors section of Synopsys’ recently filed Quarterly Report on Form 10-Q. Synopsys undertakes no duty to, and does not intend to, update any forward-looking statement, whether as a result of new information, future events, or otherwise, unless required by law.

Editorial Contact: 
Kelli Wheeler 
Synopsys, Inc. 
(518) 248-0780
kelliw@synopsys.com
corp-pr@synopsys.com

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SOURCE Synopsys, Inc.